The approaches described in this section are approaches that could be pursued, but not necessarily approaches that have been previously conceived or pursued. Therefore, unless otherwise indicated, it should not be assumed that any of the approaches described in this section qualify as prior art merely by virtue of their inclusion in this section.
Memory constraints are a performance bottleneck for many computing apparatuses, such as network routers, switches, and other infrastructure devices. For example, a router may need to cache or store large tables of packet headers, policies, attributes, instructions, or other information. Adding additional memory and/or including higher-speed memory in such apparatuses may increase their performance. However, there are a number of practical limitations to how much memory, higher-speed or otherwise, may be included in a computing apparatus.
In some cases, an alternative to increasing the amount of memory may be to store data in a compressed format within the available memory. For example, a general-purpose processor within the apparatus may be configured to compress the data before storing the data in memory by executing software-based instructions for any of a number of conventional compression algorithms. The general-purpose processor may then decompress the stored data as needed by executing software-based instructions for counterpart decompression algorithm(s). However, utilizing a general-purpose processor to execute a conventional software decompression algorithm prior to processing the data may be costly from a performance-perspective, overly complex, and/or not optimal for certain types of usage patterns.